1. Field of the Invention
The present invention is directed to methods and devices using a group III nitride compound semiconductor represented by a general formula AlxGayIn1-x-yN (0xe2x89xa6xxe2x89xa61, 0xe2x89xa6yxe2x89xa61, 0xe2x89xa6x+yxe2x89xa61). In particular, the present invention is directed to methods and devices using a group III nitride compound semiconductor which has a substrate comprising silicon (Si). A group III nitride compound semiconductor layer comprises binary compounds such as AlN, GaN, and InN. A group III nitride compound semiconductor layer also comprises ternary compounds such as AlxGa1-xN, AlxIn1-xN; and GaxIn1-xN (0 less than x less than 1). And a group III nitride compound semiconductor layer further comprises quaternary compounds such as AlxGayIn1-x-yN (0 less than x less than 1, 0 less than y less than 1, 0 less than x+y less than 1).
2. Description of the Related Art
A group III nitride compound semiconductor is a direct-transition-type semiconductor having a wide emission spectrum range from ultraviolet to red, and is applied to light-emitting devices such as light-emitting diodes (LEDs) and laser diodes (LDs). Group III nitride compound semiconductors are, in general, formed on a sapphire substrate.
However, in the above-described conventional technique, when a layer of a group III nitride compound semiconductor is formed on a sapphire substrate, cracks and/or warpage may be generated in the semiconductor layer. These flaws form due to differences in thermal expansion coefficients between the sapphire substrate and the group III nitride compound semiconductor. As a consequence, dislocations are generated in the semiconductor layer due to misfit, resulting in degraded device characteristics. Further, because sapphire has an insulation characteristic, both positive and negative electrodes need to be formed on the same side of the sapphire substrate, resulting in limitation of miniaturizing the device and degraded manufacturing efficiency. Moreover, because the substrate and the semiconductor layer are made of different materials, the conventional laser diodes have difficulty in obtaining a good cleavage.
Accordingly, in light of the above problems, an object of the present invention is to realize an efficient method capable of forming a layer of a group III nitride compound semiconductor represented by a general formula AlxGayIn1-x-yN (0xe2x89xa6xxe2x89xa61, 0xe2x89xa6yxe2x89xa61, 0xe2x89xa6x+yxe2x89xa61) on a silicon substrate, thereby to improve device characteristics. Another object of the present invention is to obtain the optimum surface orientation of the silicon substrate and the optimum orientation for epitaxial growth when the layer of a group III nitride compound semiconductor is formed on the silicon substrate by using epitaxial growth.
In order to solve above and other problems, in a first aspect, the present invention is a device using a group III nitride compound semiconductor comprising: a silicon (Si) substrate; a layer which is formed on (111) plane of the silicon substrate such that substrate-exposed portions are formed in a scattered manner and on which a group III nitride compound semiconductor does not grow epitaxially; and a second layer which grows epitaxially on substrate-exposed portions, or the regions which are not covered by the first layer, and which grows epitaxially on the regions which are covered by the first layer in lateral direction.
The lateral direction, as used in the specification, refers to a direction parallel to a surface of the substrate (surface direction). The second layer comprising a group III nitride compound semiconductor represented by a general formula AlxGayIn1-x-yN (0xe2x89xa6xxe2x89xa61, 0xe2x89xa6yxe2x89xa61, 0xe2x89xa6x+yxe2x89xa61) does not grow epitaxially on the first layer, and the layer formed on the substrate-exposed portions grows epitaxially on the first layer in lateral direction. Dislocations due to misfit between the silicon substrate and the group III nitride compound semiconductor grow in longitudinal direction, but they hardly grow in lateral direction. Consequently, a crystallinity of the group III nitride compound semiconductor formed on the first layer can be improved. In addition, since there are no chemical junctions between the first layer and the group III nitride compound semiconductor thereabove, the second layer causes neither warpage nor distortions which would otherwise be caused by stress in the layer.
In a second aspect, the present invention is a device using group III nitride compound semiconductor comprising: a silicon (Si) substrate; a first layer which is formed on (111) plane of the silicon substrate and made of a group III nitride compound semiconductor; a second layer which is formed on the first layer such that the first layer-exposed portions are formed in a scattered manner and on which a group III nitride compound semiconductor does not grow epitaxially; and a third layer which grows epitaxially on the third layer-exposed portions, or the regions which are not covered by the second layer, and which grows epitaxially on the regions which are covered by the second layer in lateral direction.
The third layer comprising a group III nitride compound semiconductor represented by a general formula AlxGayIn1-x-yN (0xe2x89xa6xxe2x89xa61, 0xe2x89xa6yxe2x89xa61, 0xe2x89xa6x+yxe2x89xa61) is formed on an exposed portion of the first layer comprising a group III nitride compound semiconductor represented by a general formula AlxGayIn1-x-yN (0xe2x89xa6xxe2x89xa61, 0xe2x89xa6yxe2x89xa61, 0xe2x89xa6x+yxe2x89xa61), which serves as a nucleus, as in the first aspect of the present invention. Because crystal growth of the third layer is carried out not on the silicon substrate but on a substrate having the same or similar compositions to those of the third layer, crystallinity of the third layer can be improved. Here similar compositions as used in the specification refers to close lattice constants. The reference also includes the difference of composition ratios of Al, Ga and In (including 0) in the group III nitride compound semiconductor represented by a general formula AlxGayIn1-x-yN (0xe2x89xa6xxe2x89xa61, 0xe2x89xa6yxe2x89xa61, 0xe2x89xa6x+yxe2x89xa61).
In a third aspect, the present invention forms the first layer to have two-layer structure, comprising a layer made of AlxGa1-xN (0 less than xxe2x89xa61) and a layer made of a group III nitride compound semiconductor formed thereabove. By forming the first layer, a group III nitride compound including aluminum (Al) can be formed on the silicon substrate in an excellent condition, and a group III nitride compound semiconductor of improved crystallinity can be obtained on the group III nitride compound semiconductor layer.
In a fourth aspect of the present invention, the first layer is formed in a striped pattern. In a fifth aspect of the present invention, the exposed portions formed on (111) plane of the silicon substrate or the upper surface of the third layer are longer in an axis direction which is perpendicular to  less than 110 greater than  direction of the silicon substrate. In short, the first layer is formed so that the exposed portions become longer in a direction which is perpendicular to  less than 110 greater than  direction of the silicon substrate. The second layer is formed on (111) plane of the substrate or on the third layer. Because the crystal structure of the second layer is affected by (111) plane of the silicon substrate, it can optimize the direction of epitaxial lateral growth of the second layer. Here  less than 110 greater than  direction represents [110], [011] and [101] axes directions.
In a sixth aspect of the present invention, the first layer is formed using silicon oxide (SiO2). In this case, the second layer is formed by using a group III nitride compound semiconductor which does not include aluminum (Al), and the second layer does not grow epitaxially on the first layer but grows epitaxially in lateral direction. As a result, crystallinity of the second layer can be improved.
In a seventh aspect of the present invention, the first layer is formed using metals of high melting point or an amorphous silicon (Si). Because the first layer has conduction characteristic, electric current can flow uniformly in perpendicular direction to the surface between the second layer and the silicon substrate when the silicon substrate has conduction characteristic. As a result, electrodes can be formed on the silicon substrate and on the group III nitride compound semiconductor, and the device can be miniaturized. Metals of high melting point refer to metals whose melting point is larger than 2000xc2x0 C., e.g., niobium (Nb), molybdenum (Mo), ruthenium (Ru), hafnium (Hf), tantalum (Ta), and tungsten (W).
In an eighth aspect, the present invention is a method for manufacturing the group III nitride compound semiconductor of the first to third aspects represented by a general formula AlxGayIn1-x-yN (0xe2x89xa6xxe2x89xa61, 0xe2x89xa6yxe2x89xa61, 0xe2x89xa6x+yxe2x89xa61). In a ninth aspect of the present invention, the method of the eighth aspect is repeated several times. In a tenth aspect, the present invention is a method for manufacturing the group III nitride compound semiconductor of the fourth and fifth aspects represented by a general formula AlxGayIn1-x-yN (0xe2x89xa6xxe2x89xa61, 0xe2x89xa6yxe2x89xa61, 0xe2x89xa6x+yxe2x89xa61). By using these various methods, a group III nitride compound semiconductor represented by a general formula AlxGayIn1-x-yN (0xe2x89xa6xxe2x89xa61, 0xe2x89xa6yxe2x89xa61, 0xe2x89xa6x+yxe2x89xa61) and having excellent crystallinity can be obtained.
A twelfth aspect of the present invention shows the same effect as in the sixth and seventh aspects of the present invention. A thirteenth aspect of the present invention is a wafer by removing at least silicon substrate among the silicon substrate, the third layer and the first layer. As a result, a single group III nitride compound semiconductor represented by a general formula AlxGayIn1-x-yN (0xe2x89xa6xxe2x89xa61, 0xe2x89xa6yxe2x89xa61, 0xe2x89xa6x+yxe2x89xa61) can be obtained as a substrate.
Here layers in a striped pattern are not necessarily formed on the entire surface but can be formed where they are necessary. And length of the regions formed in a striped pattern to expose the silicon substrate or the third layer can be arbitrary. The silicon or the third layer-exposed portions can be formed in a length so as to cross the entire length of the substrate, or can be formed intermittently. And when the silicon or the third layer-exposed portions are connected to the regions which are not formed in a striped pattern and the regions which are formed in a striped pattern has only a small proportion of the entire surface, that is all included in the present embodiment.